Introduction
　　For yearsCONTROL ENGINEERING China版权所有, EDA industry experts have warned that as designs get more complexwww.cechina.cn, the process of verifying these designs will be very expensive and time consuming, and in MAny cases more complex than the very designs being verified. In the past few yearsCONTROL ENGINEERING China版权所有, high-performance embedded systems for controlsCONTROL ENGINEERING China版权所有, signal processing and communications applications have delivered on the first part of the warning, complexity, driven by the trend to miniaturize designs, and by the trend to integrate multiple functional units into a single device. To counter this Increasing complexity, designers are adopting "design to test" methodology, and benefiting from a) bit-true simulation of Model-Based Design executable models to identify and fix flaws during design; b) automatic code generation to quickly prototype designs; and more recently c) utilizing the original executable models to directly validate final implementations through cosimulation. This article focuses on the third benefit, namely utilizing the original executable models for verification and validation控制工程网版权所有, and shows that system-level verification through cosimulation is now a proven way to validate and verify RTL implementations. Fast bidirectional cosimulation interfaces between higher-level system design environments and high-performance HDL simulators make this possible.